Regviz

Silicon Labs /EFR32MG24A620F1536IM40 /AGC_S /CTRL4

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTRL4

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/AGC_S/CTRL4#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PERIODRFPKD0 (DISRFPKDCNTRST)DISRFPKDCNTRST 0 (DISRSTCONDI)DISRSTCONDI 0RFPKDPRDGEAR 0 (RFPKDSYNCSEL)RFPKDSYNCSEL 0 (RFPKDSEL)RFPKDSEL 0 (FRZPKDEN)FRZPKDEN 0 (RFPKDCNTEN)RFPKDCNTEN

Description

No Description

Fields

PERIODRFPKD

RFPKD trigger measure period
DISRFPKDCNTRST

Disable PGOCELOT-5333 fix
DISRSTCONDI

Disable PGOCELOT-5333 fix
RFPKDPRDGEAR

RFPKD Period Gear
RFPKDSYNCSEL

SYNC RF PKD OUTPUT SELECT
RFPKDSEL

RF PKD OUTPUT SELECT
FRZPKDEN

PKD Freeze Enable
RFPKDCNTEN

Counter-based RFPKD Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data